Monday, February 2, 2009

EMBEDDED SOFTWARE FOR SoC


EMBEDDED SOFTWARE FOR SoC

Embedded Software for SoC
PART I:EMBEDDED OPERATING SYSTEMS FOR SOC
Chapter 1:APPLICATION MAPPING TO A HARDWARE PLATFORM THROUGH
ATOMATED CODE GENERATION TARGETING A RTOS
Chapter 2:FORMAL METHODS FOR INTEGRATION OF AUTOMOTIVE SOFTWARE
Chapter 3:LIGHTWEIGHT IMPLEMENTATION OF THE POSIX THREADS API FOR
AN ON-CHIP MIPS MULTIPROCESSOR WITH VCI INTERCONNECT
Chapter 4:DETECTING SOFT ERRORS BY A PURELY SOFTWARE APPROACH:
METHOD, TOOLS AND EXPERIMENTAL RESULTS
PART II:OPERATING SYSTEM ABSTRACTION AND TARGETING
Chapter 5:RTOS MODELLING FOR SYSTEM LEVEL DESIGN
Chapter 6:MODELING AND INTEGRATION OF PERIPHERAL DEVICES IN EMBEDDED SYSTEMS
Chapter 7:SYSTEMATIC EMBEDDED SOFTWARE GENERATION FROM SYSTEMIC
PART III:
EMBEDDED SOFTWARE DESIGN AND IMPLEMENTATION
Chapter 8:EXPLORING SW PERFORMANCE USING SOC TRANSACTION-LEVEL
MODELING
Chapter 9:A FLEXIBLE OBJECT-ORIENTED SOFTWARE ARCHITECTURE FOR SMART
WIRELESS COMMUNICATION DEVICES
Chapter 10:SCHEDULING AND TIMING ANALYSIS OF HW/SW ON-CHIP
COMMUNICATION IN MP SOC DESIGN
Chapter 11:EVALUATION OF APPLYING SPECC TO THE INTEGRATED DESIGN
METHOD OF DEVICE DRIVER AND DEVICE
Chapter 12:INTERACTIVE RAY TRACING ON RECONFIGURABLE SIMD MORPHOSYS
Chapter 13:PORTING A NETWORK CRYPTOGRAPHIC SERVICE TO THE RMC2000
PART IV:EMBEDDED OPERATING SYSTEMS FOR SOC
Chapter 14:INTRODUCTION TO HARDWARE ABSTRACTION LAYERS FOR SOC
Chapter 15:HARDWARE/SOFTWARE PARTITIONING OF OPERATING SYSTEMS
Chapter 16:EMBEDDED SW IN DIGITAL AM-FM CHIPSET
PART V:SOFTWARE OPTIMISATION FOR EMBEDDED SYSTEMS
Chapter 17:CONTROL FLOW DRIVEN SPLITTING OF LOOP NESTS AT THE SOURCE
CODE LEVEL
Chapter 18:DATA SPACE ORIENTED SCHEDULING
Chapter 19:COMPILER-DIRECTED ILP EXTRACTION FOR CLUSTERED VLIW/EPIC MACHINES
Chapter 20:STATE SPACE COMPRESSION IN HISTORY DRIVEN QUASI-STATIC
SCHEDULING
Chapter 21:SIMULATION TRACE VERIFICATION FOR QUANTITATIVE CONSTRAINTS
PART VI:ENERGY AWARE SOFTWARE TECHNIQUES
Chapter 22:EFFICIENT POWER/PERFORMANCE ANALYSIS OF EMBEDDED AND
GENERAL PURPOSE SOFTWARE APPLICATIONS
Chapter 23:DYNAMIC PARALLELIZATION OF ARRAY BASED ON-CHIP MULTIPROCESSOR
APPLICATIONS
Chapter 24:SDRAM-ENERGY-AWARE MEMORY ALLOCATION FOR DYNAMIC
MULTI-MEDIA APPLICATIONS ON MULTI-PROCESSOR PLATFORMS
PART VII:SAFE AUTOMOTIVE SOFTWARE DEVELOPMENT
Chapter 25:SAFE AUTOMOTIVE SOFTWARE DEVELOPMENT
PART VIII:EMBEDDED  SYSTEM ARCHITECTURE
Chapter 26:EXPLORING HIGH BANDWIDTH PIPELINED CACHE ARCHITECTURE FOR
SCALED TECHNOLOGY
Chapter 27:ENHANCING SPEEDUP IN NETWORK PROCESSING APPLICATIONS BY
EXPLOITING INSTRUCTION REUSE WITH FLOW AGGREGATION
Chapter 28:ON-CHIP STOCHASTIC COMMUNICATION
Chapter 29:HARDWARE/SOFTWARE TECHNIQUES FOR IMPROVING CACHE
PERFORMANCE IN EMBEDDED SYSTEMS
Chapter 30:RAPID CONFIGURATION & INSTRUCTION SELECTION FOR AN ASIP:
A CASE STUDY
PART IX:TRANSFORMATIONS FOR REAL-TIME SOFTWARE
Chapter 31:GENERALIZED DATA TRANSFORMATIONS
Chapter 32:SOFTWARE STREAMING VIA BLOCK STREAMING
Chapter 33:ADAPTIVE CHECKPOINTING WITH DYNAMIC VOLTAGE SCALING IN
EMBEDDED REAL-TIME SYSTEMS
PART X:LOW POWER SOFTWARE
Chapter 34:SOFTWARE ARCHITECTURAL TRANSFORMATIONS
Chapter 35:DYNAMIC FUNCTIONAL UNIT ASSIGNMENT FOR LOW POWER
Chapter 36:ENERGY-AWARE PARAMETER PASSING
Chapter 37:LOW ENERGY ASSOCIATIVE DATA CACHES FOR EMBEDDED SYSTEMS

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